US 11,322,171 Parallel signal processing system and method

5 defendants · 5 suits · updated September 14, 2026

Also cited as U.S. Patent No. 11,322,171 · US11322171B1 · US 11,322,171 B1 · 11322171 · the '171 patent

Patent Armory Inc. has filed 5 patent-infringement suits on US 11,322,171, "Parallel signal processing system and method" since July 13, 2026, all in the E.D. Tex., against 5 distinct defendants including Chipsee Co., Limited, Kramer Electronics Ltd. and Pyramid AG. The patent was granted May 3, 2022 on a priority date of December 17, 2007. Its abstract opens: "A system and method for processing a plurality of channels, for example audio channels, in parallel is provided." The examiner cited 7 references during prosecution.

Assignee: Patent Armory Inc
Priority date: December 17, 2007
Granted: May 3, 2022
Expires: December 17, 2027
Status: Active
Claims: 20 (3 independent)
Inventors: Wai Wu
Full text: Google Patents

The suits

5 cases · E.D. Tex. (5)

Filed	Defendant	Plaintiff	Court	Docket
2026-07-13	Chipsee Co., Limited	Patent Armory Inc.	E.D. Tex.	2:26-cv-00575
2026-07-13	Kramer Electronics Ltd.	Patent Armory Inc.	E.D. Tex.	2:26-cv-00576
2026-07-13	Pyramid AG	Patent Armory Inc.	E.D. Tex.	2:26-cv-00577
2026-07-13	UMIDIGI Technology Co., Ltd.	Patent Armory Inc.	E.D. Tex.	2:26-cv-00579
2026-07-13	Winmate Inc.	Patent Armory Inc.	E.D. Tex.	2:26-cv-00580

Docket links open the public record on CourtListener. Filing dates are the complaint's.

Independent claims

What is actually asserted, verbatim.

Claim 1

1. A method for processing signals, comprising: (a) receiving data representing a time slice of a stream of time-sequential information for each of a plurality of streams of time-sequential information; (b) automatically performing at least one transform process on the received time slice of the stream of time-sequential information for each of the plurality of streams of time-sequential information, to produce transformed data, with at least one single-instruction, multiple-data type parallel processor having a plurality of processing cores concurrently executing the same at least one transform process for each respective stream of time-sequential information, under a common set of instructions; (c) making at least one decision based on the transformed data of each time slice, with at least one single-instruction, multiple-data type parallel processor having a plurality of processing cores concurrently executing the same at least one transform process for each respective stream of time-sequential information, under a common set of instructions; and (d) communicating information representing the decision through a digital communication interface.

Claim 13

13. A non-transitory computer readable medium storing instructions for controlling a programmable processor to perform a method, comprising: (a) instructions for receiving data representing a plurality of respective time slices of a plurality of parallel streams of time-sequential information; (b) a common set of transform instructions for concurrently performing at least one transform process on the received plurality of respective time slices of the plurality of parallel streams of time-sequential information in parallel to produce respective transformed data for each respective time slice, with at least one single-instruction, multiple-data type parallel processor having a plurality of processing cores executing concurrently under the common set of transform instructions; (c) a common set of decisional instructions for concurrently making at least one decision based on the transformed data, with the at least one single-instruction, multiple-data type parallel processor having the plurality of processing cores executing concurrently under the common set of decisional instructions; and (d) instructions for communicating information representing the decision through a digital communication interface.

Claim 15

15. A system for processing streams of information, comprising: (a) an input port configured to receive data representing a plurality of time slices of a plurality of streams of time-sequential information; (b) at least one single-instruction, multiple-data type parallel processor having a plurality of processing cores synchronized to concurrently execute the same instruction, configured to: perform a transform process on the plurality of time slices to produce transformed data, the transform process being performed by concurrent execution of a common set of transform instructions on the plurality of processing cores; and make at least one decision based on the transformed data of the plurality of time slices, the decision being made by concurrent execution of a common set of decision instructions on the plurality of processing cores; and (c) an output port configured to communicate information representing the decision through a digital communication interface.

Art before the examiner

307 references of record, 7 cited by the examiner.

Everything listed here was before the Office and is what a challenge must go beyond. Art the examiner never saw is where an invalidity search starts.

Examiner-cited

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Classification

G10L15/34primary — Adaptation of a single recogniser for parallel processing, e.g. by use of multiple processors or cloud computing
G10L25/27primary — Speech or voice analysis techniques not restricted to a single one of groups G10L15/00 - G10L21/00 characterised by the analysis technique
G10L25/18 — Speech or voice analysis techniques not restricted to a single one of groups G10L15/00 - G10L21/00 characterised by the type of extracted parameters the extracted parameters being spectral information of each sub-band
G10L25/21 — Speech or voice analysis techniques not restricted to a single one of groups G10L15/00 - G10L21/00 characterised by the type of extracted parameters the extracted parameters being power information
H04M19/02 — Current supply arrangements for telephone systems providing ringing current or supervisory tones, e.g. dialling tone or busy tone
H04M7/129 — Details of providing call progress tones or announcements

Family

US11322171B1 — B1 (2022)
US9692908B1 — B1 (2017)
US10127925B1 — B1 (2018)
US20090154690A1 — A1 (2009)
US9064496B1 — B1 (2015)
US8515052B2 — B2 (2013)
US10803883B1 — B1 (2020)

Abstract

A system and method for processing a plurality of channels, for example audio channels, in parallel is provided. For example, a plurality of telephony channels are processed in order to detect and respond to call progress tones. The channels may be processed according to a common transform algorithm. Advantageously, a massively parallel architecture is employed, in which operations on many channels are synchronized, to achieve a high efficiency parallel processing environment. The parallel processor may be situated on a data bus, separate from a main general-purpose processor, or integrated with the processor in a common board or integrated device. All, or a portion of a speech processing algorithm may also be performed in a massively parallel manner.

Also asserted by Patent Armory Inc.

US 10,127,925 — Parallel signal processing system and method (5 defendants)

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