Patents in suit

US 8,291,289 Low density parity check (LDPC) code

3 defendants · 3 suits · updated October 6, 2026

Also cited as U.S. Patent No. 8,291,289 · US8291289B2 · US 8,291,289 B2 · 8291289 · the '289 patent

Malikie Innovations Ltd. has filed 3 patent-infringement suits on US 8,291,289, "Low density parity check (LDPC) code" since May 11, 2026, 2 of them in the N.D. Tex., against 3 distinct defendants including American Honda Motor Co., Inc., Toyota Motor Corporation and Stellantis NV. The patent is held by 2256355 Ontario Ltd and was granted October 16, 2012 on a priority date of October 12, 2004. Its abstract opens: "Low density parity check code (LDPC) base parity check matrices and the method for use thereof in communication systems."

Assignee
2256355 Ontario Ltd
Priority date
October 12, 2004
Granted
October 16, 2012
Expires
October 12, 2024
Status
Expired - Lifetime
Claims
14 (14 independent)
Inventors
Michael Livshitz
Full text
Google Patents

The suits

3 cases · N.D. Tex. (2) · E.D. Tex. (1)

Filed Defendant Plaintiff Court Docket
2026-05-11 American Honda Motor Co., Inc. Malikie Innovations Ltd. N.D. Tex. 3:26-cv-01503
2026-06-12 Toyota Motor Corporation Malikie Innovations Ltd. E.D. Tex. 2:26-cv-00469
2026-07-27 Stellantis NV Malikie Innovations Ltd N.D. Tex. 3:26-cv-02475

Docket links open the public record on CourtListener. Filing dates are the complaint's.

Independent claims

What is actually asserted, verbatim.

Claim 1

1. A transceiver, comprising: an LDPC encoder operable to apply the following expanded parity check matrix to input data to generate encoded data: 61 75 4 63 56 - 1 - 1 - 1 - 1 - 1 - 1 8 - 1 2 17 25 56 74 77 20 - 1 - 1 - 1 64 24 4 67 - 1 7 - 1 - 1 - 1 28 21 68 10 7 14 65 - 1 - 1 - 1 23 - 1 - 1 - 1 75 - 1 48 38 43 78 76 - 1 - 1 - 1 - 1 5 36 - 1 15 72 - 1 - 1 40 2 53 25 - 1 52 62 - 1 20 - 1 - 1 44 - 1 - 1 - 1 - 1 69 23 64 10 22 - 1 21 - 1 - 1 - 1 - 1 - 1 68 23 29 - 1 12 0 68 20 55 61 - 1 40 - 1 - 1 - 1 52 - 1 - 1 - 1 44 58 8 34 64 78 - 1 - 1 11 78 24 - 1 - 1 - 1 - 1 - 1 58 ⁢ 1 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 0 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 0 0 1 - 1 - 1 - 1 - 1 - 1 - 1 0 wherein −1 represents an 81×81 all-zero square matrix, and any other integer, s ij , represents an 81×81 identity matrix circularly right shifted by a shift amount equal to the integer value of s ij ; a channel encoder operable to channel encode the encoded data; a modulator operable to modulate the channel encoded data onto a carrier; a transmitter operable to transmit the modulated channel encoded data over a transmission medium; a receiver operable to receive modulated channel encoded data from the transmission medium; a demodulator operable to demodulate the received modulated channel encoded data; a channel decoder operable to channel decode the demodulated channel encoded data; and an LDPC decoder operable to apply said expanded parity check matrix to the channel decoded data to generate decoded data.

Claim 2

2. A method of operating a transceiver, comprising: applying the following expanded parity check matrix to input data to generate encoded data: 61 75 4 63 56 - 1 - 1 - 1 - 1 - 1 - 1 8 - 1 2 17 25 1 0 - 1 - 1 - 1 - 1 - 1 - 1 56 74 77 20 - 1 - 1 - 1 64 24 4 67 - 1 7 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 28 21 68 10 7 14 65 - 1 - 1 - 1 23 - 1 - 1 - 1 75 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 48 38 43 78 76 - 1 - 1 - 1 - 1 5 36 - 1 15 72 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 40 2 53 25 - 1 52 62 - 1 20 - 1 - 1 44 - 1 - 1 - 1 - 1 0 - 1 - 1 - 1 0 0 - 1 - 1 69 23 64 10 22 - 1 21 - 1 - 1 - 1 - 1 - 1 68 23 29 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 12 0 68 20 55 61 - 1 40 - 1 - 1 - 1 52 - 1 - 1 - 1 44 - 1 - 1 - 1 - 1 - 1 - 1 0 0 58 8 34 64 78 - 1 - 1 11 78 24 - 1 - 1 - 1 - 1 - 1 58 1 - 1 - 1 - 1 - 1 - 1 - 1 0 wherein −1 represents an 81×81 all-zero square matrix, and any other integer, s ij , represents an 81×81 identity matrix circularly right shifted by a shift amount equal to the integer value of s ij ; channel encoding the encoded data; modulating the channel encoded data onto a carrier; transmitting the modulated channel encoded data over a transmission medium; receiving modulated channel encoded data from the transmission medium; demodulating the received modulated channel encoded data; channel decoding the demodulated channel encoded data; and applying said expanded parity check matrix to the channel decoded data to generate decoded data.

Claim 3

3. Apparatus for preparing data for transmission over a transmission medium, comprising: an input port operable to receive input data from a data source; and circuitry coupled to the input port and operable to apply the following expanded parity check matrix to the input data to generate encoded data: 61 75 4 63 56 - 1 - 1 - 1 - 1 - 1 - 1 8 - 1 2 17 25 1 0 - 1 - 1 - 1 - 1 - 1 - 1 56 74 77 20 - 1 - 1 - 1 64 24 4 67 - 1 7 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 28 21 68 10 7 14 65 - 1 - 1 - 1 23 - 1 - 1 - 1 75 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 48 38 43 78 76 - 1 - 1 - 1 - 1 5 36 - 1 15 72 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 40 2 53 25 - 1 52 62 - 1 20 - 1 - 1 44 - 1 - 1 - 1 - 1 0 - 1 - 1 - 1 0 0 - 1 - 1 69 23 64 10 22 - 1 21 - 1 - 1 - 1 - 1 - 1 68 23 29 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 12 0 68 20 55 61 - 1 40 - 1 - 1 - 1 52 - 1 - 1 - 1 44 - 1 - 1 - 1 - 1 - 1 - 1 0 0 58 8 34 64 78 - 1 - 1 11 78 24 - 1 - 1 - 1 - 1 - 1 58 1 - 1 - 1 - 1 - 1 - 1 - 1 0 wherein −1 represents an 81×81 all-zero square matrix, and any other integer, s ij , represents an 81×81 identity matrix circularly right shifted by a shift amount equal to the integer value of s ij ; a channel encoder operable to channel encode the encoded data; and a modulator operable to modulate the channel encoded data onto a carrier.

Claim 4

4. Apparatus for preparing data for transmission over a transmission medium, comprising: an input port operable to receive input data from a data source; and a matrix application element operable to apply the following expanded parity check matrix to the input data to generate encoded data: 61 75 4 63 56 - 1 - 1 - 1 - 1 - 1 - 1 8 - 1 2 17 25 1 0 - 1 - 1 - 1 - 1 - 1 - 1 56 74 77 20 - 1 - 1 - 1 64 24 4 67 - 1 7 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 28 21 68 10 7 14 65 - 1 - 1 - 1 23 - 1 - 1 - 1 75 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 48 38 43 78 76 - 1 - 1 - 1 - 1 5 36 - 1 15 72 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 40 2 53 25 - 1 52 62 - 1 20 - 1 - 1 44 - 1 - 1 - 1 - 1 0 - 1 - 1 - 1 0 0 - 1 - 1 69 23 64 10 22 - 1 21 - 1 - 1 - 1 - 1 - 1 68 23 29 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 12 0 68 20 55 61 - 1 40 - 1 - 1 - 1 52 - 1 - 1 - 1 44 - 1 - 1 - 1 - 1 - 1 - 1 0 0 58 8 34 64 78 - 1 - 1 11 78 24 - 1 - 1 - 1 - 1 - 1 58 1 - 1 - 1 - 1 - 1 - 1 - 1 0 wherein −1 represents an 81×81 all-zero square matrix, and any other integer, s ij , represents an 81×81 identity matrix circularly right shifted by a shift amount equal to the integer value of s ij ; a channel encoder operable to channel encode the encoded data; and a modulator operable to modulate the channel encoded data onto a carrier.

Claim 5

5. Apparatus for preparing data for transmission over a transmission medium, comprising: an input port operable to receive input data from a data source; and means for applying the following expanded parity check matrix to the input data to generate encoded data: 61 75 4 63 56 - 1 - 1 - 1 - 1 - 1 - 1 8 - 1 2 17 25 1 0 - 1 - 1 - 1 - 1 - 1 - 1 56 74 77 20 - 1 - 1 - 1 64 24 4 67 - 1 7 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 28 21 68 10 7 14 65 - 1 - 1 - 1 23 - 1 - 1 - 1 75 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 48 38 43 78 76 - 1 - 1 - 1 - 1 5 36 - 1 15 72 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 40 2 53 25 - 1 52 62 - 1 20 - 1 - 1 44 - 1 - 1 - 1 - 1 0 - 1 - 1 - 1 0 0 - 1 - 1 69 23 64 10 22 - 1 21 - 1 - 1 - 1 - 1 - 1 68 23 29 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 12 0 68 20 55 61 - 1 40 - 1 - 1 - 1 52 - 1 - 1 - 1 44 - 1 - 1 - 1 - 1 - 1 - 1 0 0 58 8 34 64 78 - 1 - 1 11 78 24 - 1 - 1 - 1 - 1 - 1 58 1 - 1 - 1 - 1 - 1 - 1 - 1 0 wherein −1 represents an 81×81 all-zero square matrix, and any other integer, s ij , represents an 81×81 identity matrix circularly right shifted by a shift amount equal to the integer value of s ij ; a channel encoder operable to channel encode the encoded data; and a modulator operable to modulate the channel encoded data onto a carrier.

Claim 6

6. A method of preparing data for transmission over a transmission medium, comprising: applying the following expanded parity check matrix to the data to generate encoded data: 61 75 4 63 56 - 1 - 1 - 1 - 1 - 1 - 1 8 - 1 2 17 25 1 0 - 1 - 1 - 1 - 1 - 1 - 1 56 74 77 20 - 1 - 1 - 1 64 24 4 67 - 1 7 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 28 21 68 10 7 14 65 - 1 - 1 - 1 23 - 1 - 1 - 1 75 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 48 38 43 78 76 - 1 - 1 - 1 - 1 5 36 - 1 15 72 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 40 2 53 25 - 1 52 62 - 1 20 - 1 - 1 44 - 1 - 1 - 1 - 1 0 - 1 - 1 - 1 0 0 - 1 - 1 69 23 64 10 22 - 1 21 - 1 - 1 - 1 - 1 - 1 68 23 29 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 12 0 68 20 55 61 - 1 40 - 1 - 1 - 1 52 - 1 - 1 - 1 44 - 1 - 1 - 1 - 1 - 1 - 1 0 0 58 8 34 64 78 - 1 - 1 11 78 24 - 1 - 1 - 1 - 1 - 1 58 1 - 1 - 1 - 1 - 1 - 1 - 1 0 wherein −1 represents an 81×81 all-zero square matrix, and any other integer, s ij , represents an 81×81 identity matrix circularly right shifted by a shift amount equal to the integer value of s ij ; channel encoding the encoded data; and modulating the channel encoded data onto a carrier.

Claim 7

7. Apparatus for decoding data received over a transmission medium, comprising: a demodulator operable to demodulate the received data; a channel decoder operable to channel decode the demodulated data; and circuitry operable to apply the following expanded parity check matrix to the channel decoded data to generate decoded data: 61 75 4 63 56 - 1 - 1 - 1 - 1 - 1 - 1 8 - 1 2 17 25 1 0 - 1 - 1 - 1 - 1 - 1 - 1 56 74 77 20 - 1 - 1 - 1 64 24 4 67 - 1 7 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 28 21 68 10 7 14 65 - 1 - 1 - 1 23 - 1 - 1 - 1 75 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 48 38 43 78 76 - 1 - 1 - 1 - 1 5 36 - 1 15 72 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 40 2 53 25 - 1 52 62 - 1 20 - 1 - 1 44 - 1 - 1 - 1 - 1 0 - 1 - 1 - 1 0 0 - 1 - 1 69 23 64 10 22 - 1 21 - 1 - 1 - 1 - 1 - 1 68 23 29 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 12 0 68 20 55 61 - 1 40 - 1 - 1 - 1 52 - 1 - 1 - 1 44 - 1 - 1 - 1 - 1 - 1 - 1 0 0 58 8 34 64 78 - 1 - 1 11 78 24 - 1 - 1 - 1 - 1 - 1 58 1 - 1 - 1 - 1 - 1 - 1 - 1 0 wherein −1 represents an 81×81 all-zero square matrix, and any other integer, s ij , represents an 81×81 identity matrix circularly right shifted by a shift amount equal to the integer value of s ij .

Claim 8

8. Apparatus for decoding data received over a transmission medium, comprising: a demodulator operable to demodulate the received data; a channel decoder operable to channel decode the demodulated data; and a matrix application element operable to apply the following expanded parity check matrix to the channel decoded data to generate decoded data: 61 75 4 63 56 - 1 - 1 - 1 - 1 - 1 - 1 8 - 1 2 17 25 1 0 - 1 - 1 - 1 - 1 - 1 - 1 56 74 77 20 - 1 - 1 - 1 64 24 4 67 - 1 7 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 28 21 68 10 7 14 65 - 1 - 1 - 1 23 - 1 - 1 - 1 75 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 48 38 43 78 76 - 1 - 1 - 1 - 1 5 36 - 1 15 72 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 40 2 53 25 - 1 52 62 - 1 20 - 1 - 1 44 - 1 - 1 - 1 - 1 0 - 1 - 1 - 1 0 0 - 1 - 1 69 23 64 10 22 - 1 21 - 1 - 1 - 1 - 1 - 1 68 23 29 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 12 0 68 20 55 61 - 1 40 - 1 - 1 - 1 52 - 1 - 1 - 1 44 - 1 - 1 - 1 - 1 - 1 - 1 0 0 58 8 34 64 78 - 1 - 1 11 78 24 - 1 - 1 - 1 - 1 - 1 58 1 - 1 - 1 - 1 - 1 - 1 - 1 0 wherein −1 represents an 81×81 all-zero square matrix, and any other integer, s ij , represents an 81×81 identity matrix circularly right shifted by a shift amount equal to the integer value of s ij .

Claim 9

9. Apparatus for decoding data received over a transmission medium, comprising: a demodulator operable to demodulate the received data; a channel decoder operable to channel decode the demodulated data; and means for applying the following expanded parity check matrix to the channel decoded data to generate decoded data: 61 75 4 63 56 - 1 - 1 - 1 - 1 - 1 - 1 8 - 1 2 17 25 1 0 - 1 - 1 - 1 - 1 - 1 - 1 56 74 77 20 - 1 - 1 - 1 64 24 4 67 - 1 7 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 28 21 68 10 7 14 65 - 1 - 1 - 1 23 - 1 - 1 - 1 75 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 48 38 43 78 76 - 1 - 1 - 1 - 1 5 36 - 1 15 72 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 40 2 53 25 - 1 52 62 - 1 20 - 1 - 1 44 - 1 - 1 - 1 - 1 0 - 1 - 1 - 1 0 0 - 1 - 1 69 23 64 10 22 - 1 21 - 1 - 1 - 1 - 1 - 1 68 23 29 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 12 0 68 20 55 61 - 1 40 - 1 - 1 - 1 52 - 1 - 1 - 1 44 - 1 - 1 - 1 - 1 - 1 - 1 0 0 58 8 34 64 78 - 1 - 1 11 78 24 - 1 - 1 - 1 - 1 - 1 58 1 - 1 - 1 - 1 - 1 - 1 - 1 0 wherein −1 represents an 81×81 all-zero square matrix, and any other integer, s ij , represents an 81×81 identity matrix circularly right shifted by a shift amount equal to the integer value of s ij .

Claim 10

10. A method of decoding data received over a transmission medium, comprising: demodulating the received data; channel decoding the demodulated data; and applying the following expanded parity check matrix to the channel decoded data to generate decoded data: 61 75 4 63 56 - 1 - 1 - 1 - 1 - 1 - 1 8 - 1 2 17 25 1 0 - 1 - 1 - 1 - 1 - 1 - 1 56 74 77 20 - 1 - 1 - 1 64 24 4 67 - 1 7 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 28 21 68 10 7 14 65 - 1 - 1 - 1 23 - 1 - 1 - 1 75 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 48 38 43 78 76 - 1 - 1 - 1 - 1 5 36 - 1 15 72 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 40 2 53 25 - 1 52 62 - 1 20 - 1 - 1 44 - 1 - 1 - 1 - 1 0 - 1 - 1 - 1 0 0 - 1 - 1 69 23 64 10 22 - 1 21 - 1 - 1 - 1 - 1 - 1 68 23 29 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 12 0 68 20 55 61 - 1 40 - 1 - 1 - 1 52 - 1 - 1 - 1 44 - 1 - 1 - 1 - 1 - 1 - 1 0 0 58 8 34 64 78 - 1 - 1 11 78 24 - 1 - 1 - 1 - 1 - 1 58 1 - 1 - 1 - 1 - 1 - 1 - 1 0 wherein −1 represents an 81×81 all-zero square matrix, and any other integer, s ij , represents an 81×81 identity matrix circularly right shifted by a shift amount equal to the integer value of s ij .

Claim 11

11. A communication network, comprising: an LDPC encoder operable to apply the following expanded parity check matrix to input data to generate encoded data: 61 75 4 63 56 - 1 - 1 - 1 - 1 - 1 - 1 8 - 1 2 17 25 1 0 - 1 - 1 - 1 - 1 - 1 - 1 56 74 77 20 - 1 - 1 - 1 64 24 4 67 - 1 7 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 28 21 68 10 7 14 65 - 1 - 1 - 1 23 - 1 - 1 - 1 75 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 48 38 43 78 76 - 1 - 1 - 1 - 1 5 36 - 1 15 72 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 40 2 53 25 - 1 52 62 - 1 20 - 1 - 1 44 - 1 - 1 - 1 - 1 0 - 1 - 1 - 1 0 0 - 1 - 1 69 23 64 10 22 - 1 21 - 1 - 1 - 1 - 1 - 1 68 23 29 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 12 0 68 20 55 61 - 1 40 - 1 - 1 - 1 52 - 1 - 1 - 1 44 - 1 - 1 - 1 - 1 - 1 - 1 0 0 58 8 34 64 78 - 1 - 1 11 78 24 - 1 - 1 - 1 - 1 - 1 58 1 - 1 - 1 - 1 - 1 - 1 - 1 0 wherein −1 represents an 81×81 all-zero square matrix, and any other integer, s ij , represents an 81×81 identity matrix circularly right shifted by a shift amount equal to the integer value of s ij ; a channel encoder operable to channel encode the encoded data; a modulator operable to modulate the channel encoded data onto a carrier; a transmitter operable to transmit the modulated channel encoded data over a transmission medium; a receiver operable to receive the modulated channel encoded data from the transmission medium; a demodulator operable to demodulate the received modulated channel encoded data; a channel decoder operable to channel decode the demodulated channel encoded data; and an LDPC decoder operable to apply said expanded parity check matrix to the channel decoded data to generate decoded data.

Claim 12

12. A method of operating a communication network, comprising: applying the following expanded parity check matrix to input data to generate encoded data: 61 75 4 63 56 - 1 - 1 - 1 - 1 - 1 - 1 8 - 1 2 17 25 1 0 - 1 - 1 - 1 - 1 - 1 - 1 56 74 77 20 - 1 - 1 - 1 64 24 4 67 - 1 7 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 28 21 68 10 7 14 65 - 1 - 1 - 1 23 - 1 - 1 - 1 75 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 48 38 43 78 76 - 1 - 1 - 1 - 1 5 36 - 1 15 72 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 40 2 53 25 - 1 52 62 - 1 20 - 1 - 1 44 - 1 - 1 - 1 - 1 0 - 1 - 1 - 1 0 0 - 1 - 1 69 23 64 10 22 - 1 21 - 1 - 1 - 1 - 1 - 1 68 23 29 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 12 0 68 20 55 61 - 1 40 - 1 - 1 - 1 52 - 1 - 1 - 1 44 - 1 - 1 - 1 - 1 - 1 - 1 0 0 58 8 34 64 78 - 1 - 1 11 78 24 - 1 - 1 - 1 - 1 - 1 58 1 - 1 - 1 - 1 - 1 - 1 - 1 0 wherein −1 represents an 81×81 all-zero square matrix, and any other integer, s ij , represents an 81×81 identity matrix circularly right shifted by a shift amount equal to the integer value of s ij ; channel encoding the encoded data; modulating the channel encoded data onto a carrier; transmitting the modulated channel encoded data over a transmission medium; receiving the modulated channel encoded data from the transmission medium; demodulating the received modulated channel encoded data; channel decoding the demodulated channel encoded data; and applying said expanded parity check matrix to the channel decoded data to generate decoded data.

Claim 13

13. A low density parity check (LDPC) encoder, comprising: at least one input port operable to receive 1296 input bits from a data source; and matrix application logic coupled to the at least one input port and operable to apply the following expanded parity check matrix to the received input bits to derive 648 parity bits: 61 75 4 63 56 - 1 - 1 - 1 - 1 - 1 - 1 8 - 1 2 17 25 1 0 - 1 - 1 - 1 - 1 - 1 - 1 56 74 77 20 - 1 - 1 - 1 64 24 4 67 - 1 7 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 28 21 68 10 7 14 65 - 1 - 1 - 1 23 - 1 - 1 - 1 75 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 48 38 43 78 76 - 1 - 1 - 1 - 1 5 36 - 1 15 72 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 40 2 53 25 - 1 52 62 - 1 20 - 1 - 1 44 - 1 - 1 - 1 - 1 0 - 1 - 1 - 1 0 0 - 1 - 1 69 23 64 10 22 - 1 21 - 1 - 1 - 1 - 1 - 1 68 23 29 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 12 0 68 20 55 61 - 1 40 - 1 - 1 - 1 52 - 1 - 1 - 1 44 - 1 - 1 - 1 - 1 - 1 - 1 0 0 58 8 34 64 78 - 1 - 1 11 78 24 - 1 - 1 - 1 - 1 - 1 58 1 - 1 - 1 - 1 - 1 - 1 - 1 0 wherein −1 represents an 81×81 all-zero square matrix, and any other integer, s ij , represents an 81×81 identity matrix circularly right shifted by a shift amount equal to the integer value of s ij ; and parity bit derivation logic operable: 1) to add selected input bits to derive 81 initial parity bits; and 2) to add input bits and previously derived parity bits to recursively derive another 567 parity bits.

Claim 14

14. A method of low density parity check (LDPC) encoding data, the method comprising: receiving 1296 input bits from a data source on at least one input port; and operating matrix application logic coupled to the at least one input port and to apply the following expanded parity check matrix to the received input bits to derive 648 parity bits: 61 75 4 63 56 - 1 - 1 - 1 - 1 - 1 - 1 8 - 1 2 17 25 1 0 - 1 - 1 - 1 - 1 - 1 - 1 56 74 77 20 - 1 - 1 - 1 64 24 4 67 - 1 7 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 - 1 28 21 68 10 7 14 65 - 1 - 1 - 1 23 - 1 - 1 - 1 75 - 1 - 1 - 1 0 0 - 1 - 1 - 1 - 1 48 38 43 78 76 - 1 - 1 - 1 - 1 5 36 - 1 15 72 - 1 - 1 - 1 - 1 - 1 0 0 - 1 - 1 - 1 40 2 53 25 - 1 52 62 - 1 20 - 1 - 1 44 - 1 - 1 - 1 - 1 0 - 1 - 1 - 1 0 0 - 1 - 1 69 23 64 10 22 - 1 21 - 1 - 1 - 1 - 1 - 1 68 23 29 - 1 - 1 - 1 - 1 - 1 - 1 0 0 - 1 12 0 68 20 55 61 - 1 40 - 1 - 1 - 1 52 - 1 - 1 - 1 44 - 1 - 1 - 1 - 1 - 1 - 1 0 0 58 8 34 64 78 - 1 - 1 11 78 24 - 1 - 1 - 1 - 1 - 1 58 1 - 1 - 1 - 1 - 1 - 1 - 1 0 wherein −1 represents an 81×81 all-zero square matrix, and any other integer, s ij , represents an 81×81 identity matrix circularly right shifted by a shift amount equal to the integer value of s ij ; and operating parity bit derivation logic: 1) to add selected input bits to derive 81 initial parity bits; and 2) to add input bits and previously derived parity bits to recursively derive another 567 parity bits.

Art before the examiner

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Classification

  • H03M13/1111primary — Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
  • H03M13/1137 — Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
  • H03M13/114 — Shuffled, staggered, layered or turbo decoding schedules
  • H03M13/116 — Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
  • H03M13/118 — Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
  • H03M13/1185 — Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
  • H03M13/1188 — Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three
  • H03M13/618 — Shortening and extension of codes
  • H03M13/6362 — Error control coding in combination with rate matching by puncturing
  • H03M13/6368 — Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
  • H03M13/6393 — Rate compatible low-density parity check [LDPC] codes
  • H04L1/0057 — Block codes
  • H04L1/0068 — Rate matching by puncturing

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  • US8291289B2 — B2 (2012)
  • US8024641B2 — B2 (2011)
  • USRE49225E1 — USRE49225E1 (2022)
  • US20090259915A1 — A1 (2009)
  • US20120117440A1 — A1 (2012)
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  • US8301975B2 — B2 (2012)
  • US20070094580A1 — A1 (2007)
  • US7996746B2 — B2 (2011)
  • USRE48212E1 — USRE48212E1 (2020)
  • US20100211847A1 — A1 (2010)
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  • US20130013973A1 — A1 (2013)
  • US20100251065A1 — A1 (2010)
  • US20110307755A1 — A1 (2011)
  • US8583980B2 — B2 (2013)
  • 1 foreign family member: WO2006039801A1

Abstract

Low density parity check code (LDPC) base parity check matrices and the method for use thereof in communication systems. The method of expanding the base check parity matrix is described. Examples of expanded LDPC codes with different code lengths and expansion factors are also shown.

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  • US 8,806,197 — Accelerated verification of digital signatures and public keys (3 defendants)

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This page is assembled from public records — federal court dockets and the patent's own file — and is updated as the case list changes. It states what the record shows and is not an opinion on the validity or infringement of any claim. Patent data via Google Patents; docket data via CourtListener.